A proven track record
Years of Excellence
Years avg exp. of expert faculties
Industry Partners
Active Learners
About CREST, BITS Pilani
The Centre for Research Excellence in Semiconductor Technologies (CREST) at BITS Pilani is a leading research and innovation hub dedicated to advancing semiconductor technologies, VLSI, and system design education in India. The centre focuses on strengthening research, skill development, and industry collaboration to support the evolving semiconductor ecosystem.
CREST brings together academia, industry, and researchers to drive innovation through advanced infrastructure, hands-on training programs, and industry-aligned initiatives. By leveraging BITS Pilani’s academic excellence, CREST plays a vital role in nurturing skilled talent and enabling cutting-edge research.
Through professional certification programs, applied research, and technology-focused initiatives, CREST empowers students and professionals to gain practical, industry-ready expertise while contributing to national and global semiconductor advancements.
Program Highlights
Earn a prestigious certificate from CREST, BITS Pilani
This program is certified by National Skill Development Corporation (NSDC).
About the SystemVerilog For Verification
The Certification Program in SystemVerilog for Verification from CREST, BITS Pilani is designed for engineers, verification professionals, and early-career VLSI enthusiasts who want to gain expertise in ASIC and SoC verification using SystemVerilog. The program introduces essential verification concepts, SystemVerilog language constructs, object-oriented programming, functional coverage, and testbench development, providing a strong foundation for real-world verification.
Learners explore the complete verification flow, starting with Linux fundamentals, ASIC verification methodology, testplans, directed and random testcases, and Constraint Random Coverage Driven Verification (CRCDV). Core SystemVerilog topics, including datatypes, tasks, functions, memories, interfaces, randomization, threads, mailboxes, semaphores, and virtual interfaces, are covered with practical labs and case studies to reinforce learning.
This Online Program combines self-paced and live sessions, masterclasses by BITS Pilani faculty and industry experts, 24/7 lab and EDA tool access, and a hands-on capstone project. By the end of the course, learners are equipped to implement and verify complex SoC and ASIC designs and receive a CREST, BITS Pilani certification validating their skills for industry roles in verification.
What You Will Learn
Linux Operating System
- Different Types of Operating System
- Design Features & Layers
- Basic Linux Commands
- Advanced Commands
- Utilities
- Vi Editor
- Networking in Linux
- Hands-On Labs
ASIC Verification Methodology
- Verification Essentials
- DV Concepts and Flow
- Testplan
- Directed vs Random Testcases
- Constraint Random Coverage Driven Verification (CRCDV)
SystemVerilog Language Concepts Overview
- SystemVerilog – Introduction
- Transactions
- Interface & Virtual Interfaces
- Object Oriented Programming Concepts
- Randomization & Functional Coverage
- SV Testbench Architecture
SystemVerilog Datatypes
- Verilog Datatypes
- Logic Datatypes (4-state datatypes)
- 2-state datatypes, struct and enum
- Strings and packages
SystemVerilog Memories
- Packed and Multi-Dimensional Arrays
- Dynamic Arrays & Queues
- Associative Arrays, Array Methods
SystemVerilog Tasks & Functions
- Void Functions
- Automatic Functions/Tasks
- Pass by Value and Pass by Reference
SystemVerilog Interfaces
- SV Interfaces vs Verilog Ports
- Modports & Clocking Blocks
Object Oriented Programming – Basic
- Classes & Objects
- Constructor, Null Object
- Object Assignments
- Shallow and Deep Copy Operations
Object Oriented Programming – Advanced
- Inheritance and ‘super’ keyword
- Static Properties and Methods
- Pass by Reference for Methods in a Class | Polymorphism
- Virtual & Parameterized Classes
SV Randomization
- rand and randc qualifiers
- Randomize(), Pre and Post Randomize
- Constraints
SV Threads, Mailbox and Semaphores
- Fork-join, join any and join none
- Mailboxes
- Semaphores
SV Virtual Interfaces
- Static vs Virtual Interfaces – Introduction and Implementation
Functional Coverage
- Introduction and CRCDV
- Covergroups, Coverpoints and Bins
- Cross Bins, Covergroup Methods
Case Studies
- Case Study 1: TB Development for a Sample Design (RAM)
- Case Study 2: SV TB Development Approach for a Sub-system/SoC

What Makes This Exclusive Collaboration a Benchmark in Learning Excellence?
Highly Rated Courses
Curriculum crafted and regularly updated by top semiconductor professionals, aligned with job market needs.
Superior Training Methodology and Infrastructure
Self-paced and live online classes with Q&A, featuring 70% hands-on learning through labs, mini-projects, and a final capstone project.
Course Completion Certificate
Earn an CREST, BITS Pilani certified credential recognized by the semiconductor industry and showcase your verified skills to employers and recruiters worldwide.
Industry-Oriented Project
Solve real-world challenges with Hands-On Labs access, and enhance your portfolio through impactful, project-based learning.
Value for Money
Get exceptional value for your investment with our budget-friendly offerings.
Learn From BITS Pilani Faculty
Exclusive masterclasses offering cutting-edge insights, real-world case studies, and advanced techniques to elevate your VLSI and Embedded Systems expertise.
Our Recruiters
* Logos are the trademarks of the respective organizations.





























